NVCSI_PHY_1_CILA_INTR_0_STATUS_CILA_0 Register Error on Nvidia Jetson Orin Nano Dev Board
Issue Overview
Users of the Nvidia Jetson Orin Nano Developer Kit are experiencing difficulties when attempting to capture raw images from an Onsemi AR0234 camera sensor connected to the CAM0 interface. The primary symptom is the inability to obtain a raw image stream using v4l2-ctl commands. This issue is accompanied by specific error messages in the kernel log and trace log, indicating problems with the NVCSI (NVIDIA Camera Serial Interface) subsystem.
The most prominent error is a status code 0x10000000 reported at the NVCSI_PHY_1_CILA_INTR_0_STATUS_CILA_0 register, which corresponds to an intr_dphy_cil_lane_align_err_a on bit 28. This error suggests issues with lane alignment in the MIPI CSI-2 interface.
Possible Causes
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Hardware Mismatch: The CAM0 interface on the Orin Nano Developer Kit is designed for a x2 camera interface, but the clock lanes are not properly aligned with the expected configuration.
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Device Tree Configuration: Incorrect or suboptimal settings in the device tree, particularly related to lane polarity, clock settings, and CSI configuration.
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MIPI Clock Mismatch: Discrepancies between the expected and actual MIPI clock rates, potentially causing synchronization issues.
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Driver Compatibility: Possible incompatibilities between the camera driver and the specific hardware configuration of the Orin Nano.
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Firmware Issues: Potential bugs or limitations in the Jetson Linux firmware related to CSI interface handling.
Troubleshooting Steps, Solutions & Fixes
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Hardware Patch:
- A successful workaround involves a hardware patch:
- Connect CAM0, Pin 14 to J2, Pin 12
- Connect CAM0, Pin 15 to J2, Pin 10
- This patch resolves the clock lane mismatch issue and allows successful image capture.
- A successful workaround involves a hardware patch:
-
Device Tree Modifications:
- Update the device tree with the following key changes:
lane_polarity = "6"; discontinuous_clk = "yes"; cil_settletime = "0"; pix_clk_hz = "100000000";
- These modifications align the configuration with the hardware characteristics and timing requirements.
- Update the device tree with the following key changes:
-
MIPI Clock Configuration:
- Adjust the
pix_clk_hz
value in the device tree to match the actual MIPI clock rate observed (approximately 250 MHz in some cases). - Use an oscilloscope to measure the actual MIPI clock and adjust the configuration accordingly.
- Adjust the
-
Camera Interface Selection:
- If possible, use the CAM1 (J21) interface instead of CAM0 (J20) for x4 camera configurations.
- J21 uses CSI2_CLK, which supports both x2 and x4 camera interfaces.
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Firmware Update:
- Ensure the latest Jetson Linux (L4T) version is installed, as newer versions may include fixes for CSI-related issues.
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Debug Firmware:
- Apply the debug firmware version to gain more detailed insights into the CSI subsystem behavior.
- Analyze the additional debug information to identify potential driver or firmware-level issues.
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V4L2 Capture Command:
- Use the following command for successful raw image capture after applying the hardware patch:
v4l2-ctl -d /dev/video0 --stream-mmap --stream-count=500 --set-fmt-video=width=1920,height=1200,pixelformat=BA10 --stream-to=frame.raw --verbose --set-ctrl bypass_mode=0,sensor_mode=0
- Use the following command for successful raw image capture after applying the hardware patch:
-
Lane Configuration:
- Verify that the number of lanes (
num_lanes
) in the device tree matches the physical connection (2 lanes for CAM0).
- Verify that the number of lanes (
-
CSI Timing Parameters:
- Experiment with different
cil_settletime
values if issues persist. - Adjust
t_hs_settle
andt_clk_settle
parameters if available in the device tree or driver configuration.
- Experiment with different
-
Driver Investigation:
- Analyze the AR0234 driver code for any potential issues related to CSI configuration or timing.
- Consider reaching out to NVIDIA developer support for driver-specific guidance.
It is worth bringing up that while the hardware patch provides a working solution, it is specific to the Developer Kit. For production designs or custom carrier boards, proper routing of CSI lanes according to the Jetson Orin Nano specifications is crucial to avoid such issues.