CAPTURE_CSI_STREAM_SET_CONFIG_REQ clarification

Issue Overview

The issue revolves around the inability to configure the Nvidia Jetson Orin Nano Dev board to support various resolutions when using the tc35873 chip. Users report success with 720p60 resolution, but face challenges when attempting to achieve 1080p60 and other resolutions, regardless of the number of lanes used. The symptoms include errors in calculating the cil_config.mipi_clock_rate, which is derived from the pixel clock rate. The calculations for different resolutions yield values that exceed expected limits or are not multiples of 1000, leading to confusion about the correct configuration. This issue appears during setup and testing of different video resolutions and has been consistently reported by multiple users, indicating a significant impact on functionality and user experience.

Possible Causes

  1. Hardware Incompatibilities or Defects: The custom carrier board may not be fully compatible with the Orin Nano’s requirements for higher resolutions.
  2. Software Bugs or Conflicts: There may be bugs in the driver code, particularly in csi5_fops.c, affecting how configurations are processed.
  3. Configuration Errors: Incorrect calculations for mipi_clock_rate could lead to failures in setting up desired resolutions.
  4. Driver Issues: The drivers may not properly support resolutions higher than 720p60, leading to unexpected behavior.
  5. Environmental Factors: Power supply issues or thermal throttling could impact performance during high-resolution streaming.
  6. User Errors or Misconfigurations: Users may misconfigure settings or fail to follow correct procedures for setting up video streams.

Troubleshooting Steps, Solutions & Fixes

  1. Verify Hardware Compatibility:

    • Ensure that your custom carrier board is designed to support the required number of lanes and resolutions for the tc35873 chip.
  2. Check Driver Code:

    • Review and modify the driver code in csi5_fops.c where cil_config.mipi_clock_rate is set. The current implementation may need adjustments based on resolution requirements.
  3. Calculate MIPI Clock Rate:

    • Use the following formula for calculating mipi_clock_rate:
      $$
      mipi_clock_rate = \frac{horizontal \times vertical \times framerate \times bit_depth}{lanes} / 2
      $$
    • For example, for 1080p60:
      $$
      mipi_clock_rate = \frac{1920 \times 1080 \times 60 \times 16}{4} / 2 = 148500000
      $$
    • Ensure this value does not exceed TEGRA_CLOCK_CSI_PORT_MAX.
  4. Modify Driver Configuration:

    • Apply changes suggested by users in forum replies (e.g., adjusting bandwidth calculations):
      cdev->bw = cdev->pixel_rate * cdev->bpp / 1000;
      
  5. Boost Clock Rates:

    • To potentially resolve bandwidth issues, execute the following commands in a terminal:
      sudo su
      echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
      echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
      echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
      echo 1 > /sys/kernel/debug/bpmp/debug/clk/emc/mrq_rate_locked
      
    • Check maximum rates with:
      cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
      
  6. Test Different Configurations:

    • Experiment with different lane configurations (1, 2, and 4 lanes) to determine if specific setups yield better results for other resolutions.
  7. Consult Documentation:

    • Look for any available documentation on cil_config that might provide insights into its configuration and usage.
  8. Community Support:

    • Engage with community forums for additional insights and shared experiences regarding similar issues.
  9. Report Findings:

    • Document any successful configurations or persistent issues and share them within the community for collective troubleshooting efforts.

By following these steps, users can systematically diagnose and potentially resolve issues related to configuring video streams on the Nvidia Jetson Orin Nano Dev board while using the tc35873 chip.

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