Timestamp Glitches on Nvidia Jetson Orin Nano Dev Board with GTE FIFO Configuration

Issue Overview

Users of the Nvidia Jetson Orin Nano Dev board have reported issues related to timestamp glitches when utilizing the General Timer Event (GTE) FIFO with specific configurations. The primary symptoms include:

• Timestamp Behavior: Users observe that the low timestamps (TSC_low) occasionally report backwards, while high timestamps (TSC_high) remain stable. This inconsistency occurs intermittently, with reports of timestamps appearing to drop or be misordered.

• Signal Patterns: The GPIO signal exhibits a periodic pattern where intervals between high and low states vary unpredictably, leading to unexpected behavior in applications relying on accurate timing.

• Context of Occurrence: The issue arises during the operation of GPIO interrupts and GTE FIFO readouts, particularly when the FIFO occupancy is set to higher values (e.g., 3). Users have noted that shorter intervals between GPIO toggles (e.g., 250ms or less) tend to yield more reliable timestamp readings.

• Hardware and Software Specifications: The setup includes:

  • Jetson Orin Nano 4GB module
  • Custom carrier board
  • Jetpack 5.1.1 / L4T 35.3.1
  • Modifications to GPIO interrupt handling and GTE configurations.

• Impact on User Experience: The inconsistencies in timestamp readings can lead to significant issues in applications requiring precise timing, such as real-time data processing or event logging.

Possible Causes

Several potential causes for the observed issues have been identified:

• FIFO Configuration Issues: Setting the GTE FIFO occupancy too high may lead to mismanagement of timestamps, causing them to appear out of order or dropped altogether.

• Interrupt Handling Delays: If the interrupt service routine (ISR) is overloaded with print statements or not efficiently managing the IRQs, it may lead to timestamp corruption.

• Software Bugs: There may be underlying bugs in the GTE driver or the interrupt handling code that cause timestamps to be misreported under certain conditions.

• GPIO Debounce Settings: Inadequate debounce settings for GPIO inputs can lead to multiple triggers being registered for a single event, potentially causing incorrect timestamp readings.

• Environmental Factors: External factors such as power supply issues or temperature fluctuations could impact the performance of the hardware components.

Troubleshooting Steps, Solutions & Fixes

To address the timestamp glitches on the Nvidia Jetson Orin Nano Dev board, users can follow these troubleshooting steps and solutions:

1. Review Code Modifications:

   • Ensure that any debug print statements within the ISR are removed or minimized.
   • Implement a threaded approach for handling IRQs where timestamps are recorded in an array and processed outside of the ISR.

2. Test with Different FIFO Settings:

   • Experiment with different GTE FIFO occupancy settings (1 vs. 3) and observe if there’s a change in behavior.
   • Consider reverting to default FIFO settings if custom configurations lead to instability.

3. Adjust GPIO Debounce Settings:

   • Implement debounce logic in the GPIO application code. For example:

     val = gpio_set_irq_type(GPIO_APP_IN, GPIO_IRQ_SINGLE_EDGE, GPIO_IRQ_RISING_EDGE);
     val = gpio_set_debounce(GPIO_APP_IN, 180); // Adjust as necessary
     val = gpio_set_irq_handler(GPIO_APP_IN, can_gpio_irq_handler, NULL);
     

4. Isolate Variables:

   • Test with a simple case where GPIO toggles at a low frequency (e.g., 0.5 Hz) while monitoring timestamps for consistency.
   • Compare results with both high and low FIFO occupancy settings.

5. Collect Logs for Analysis:

   • Capture detailed logs during testing phases, especially when anomalies occur. This includes raw timestamp values and corresponding intervals.
   • Share logs with community members or support channels for further analysis.

6. Update Drivers and Firmware:

   • Ensure that all drivers and firmware are up-to-date as newer versions may contain bug fixes related to GTE functionality.

7. Consult Documentation:

   • Review relevant sections of the Technical Reference Manual (TRM) for insights on GTE register behavior and expected configurations.

8. Community Engagement:

   • Engage with community forums or Nvidia support for additional insights or similar experiences from other users facing the same issue.

9. Prepare Patches for Testing:

   • If persistent issues arise, consider preparing patches based on community feedback to enhance existing driver functionalities or correct observed behaviors.

By following these steps, users can systematically identify and resolve issues related to timestamp glitches on their Nvidia Jetson Orin Nano Dev boards while improving overall system performance and reliability.