CSI Clock Configuration Issues for Jetson Orin Nano Custom Carrier Board

Issue Overview

Users have reported difficulties configuring the CSI (Camera Serial Interface) clock for a custom carrier board designed for the Jetson Orin Nano. The main problem stems from differences between the custom board design and the original Jetson Orin Nano development kit. Specifically:

• The custom board is designed to use CSI0’s clock for output, while the original design uses CSI1’s clock.
• Users are experiencing issues receiving data without modifying the device tree.
• There are concerns about supporting 4-lane configurations on both CAM ports.

These configuration discrepancies are causing problems with camera functionality and data reception on the custom carrier board.

Possible Causes

1. Hardware design differences:
   The custom carrier board’s CSI clock routing differs from the original Jetson Orin Nano design, potentially causing compatibility issues.

2. Software configuration mismatch:
   The default device tree settings may not align with the custom hardware design, leading to improper clock and data lane assignments.

3. Firmware limitations:
   There may be camera software and firmware issues specific to certain CSI configurations, as mentioned by NVIDIA representatives.

4. Lane configuration restrictions:
   The original Jetson Orin Nano development kit has known limitations for 4-lane configurations on specific camera ports (e.g., CAM0/J20).

5. Incorrect or incomplete device tree modifications:
   Users may not have properly updated the device tree to reflect the custom hardware design, causing communication issues between the SoC and camera sensors.

Troubleshooting Steps, Solutions & Fixes

1. Verify hardware connections:
   Ensure that the custom carrier board’s CSI connections match the intended design:

   • CSI0-clkp/n
   • CSI0-d0p/n
   • CSI0-d1p/n

2. Update device tree settings:
   Modify the device tree to match the custom hardware configuration:

   • Specify the 4-lane camera sensor for using CSI-A in the device tree.
   • Example: Update the tegra_sinterface section to reflect the correct CSI interface and lane configuration.

3. Configure camera software:
   Ensure that the camera software settings align with the hardware design:

   • Update any relevant camera driver configurations to use CSI0 instead of CSI1.
   • Adjust lane polarity settings if necessary.

4. Check firmware compatibility:
   Consult with NVIDIA or the camera module manufacturer to ensure firmware compatibility with the custom CSI configuration.

5. Troubleshoot 4-lane configurations:
   If issues persist with 4-lane setups:

   • Try using CAM1 slot (J21) for 4-lane configurations, as it’s known to support this mode on the original dev kit.
   • Investigate potential software or firmware updates that may address 4-lane limitations.

6. Analyze debug logs:
   Enable and review VI (Video Input) tracing logs to diagnose frame packet status:

   • Look for CHANSEL_PXL_SOF and CHANSEL_PXL_EOF entries, which represent start-of-frame and end-of-frame events.
   • Compare logs between functioning and non-functioning camera ports to identify discrepancies.

7. Consult NVIDIA documentation:
   Review the latest Jetson Linux Developer Guide, focusing on the "Port Index 4" section for additional device tree configuration guidance.

8. Seek NVIDIA support:
   If problems persist, reach out to NVIDIA developer support with detailed information about your custom carrier board design and the troubleshooting steps you’ve already taken.

By following these steps and making the necessary adjustments to both hardware and software configurations, users should be able to resolve CSI clock and lane configuration issues on their custom Jetson Orin Nano carrier boards.